1. Field of the Invention
The present invention generally relates to a synchronous circuit for bi-directional data transfer between a plurality of entities sharing a bus and, more particularly, to a synchronous circuit which further includes a scan chain to render the bidirectional data path testable for very large scale integrated (VLSI) chips.
2. Description of the Related Art
Metal wiring is typically used to connect various components or macros on a chip to exchange data signals. These signal wires consume a great deal of physical space and therefore can impose an upper limit on the density of chip integration. Further, current lithographic wiring techniques also limit attainable wiring resolution. One way to better utilize wiring resources is to share bus wires between macros. A shared bus, also called a tri-state bus, enables more than one sending entity to control the state of the bus. A drawback to the tri-state bus is that typically only one data bit can be carried over a given wire per bus cycle. Hence, only one entity can drive the bus at a time. All other entities connected to the bus must be put in a high impedance state when not their turn else conflicts would occur.